1. Field of the Invention
The invention relates to a semiconductor device and a manufacturing method thereof, particularly, a semiconductor device having a via hole penetrating a semiconductor substrate and a manufacturing method thereof.
2. Description of the Related Art
A CSP (Chip Size Package) has received attention as a new packaging technology in recent years. The CSP is a small package having almost the same outside dimensions as those of a semiconductor die packaged in it. A BGA (Ball Grid Array) type semiconductor device has been known as a kind of the CSP.
This kind of semiconductor device has a wiring layer connected to a pad electrode on its front surface through a via hole penetrating a semiconductor substrate. A plurality of ball-shaped conductive terminals made of metal such as solder is arrayed in a grid on the back surface of the semiconductor substrate, and these conductive terminals are connected to the pad electrodes through the wiring layer. When this semiconductor device is mounted on electronic equipment, each of the conductive terminals is electrically connected to a circuit board, for example, wiring patterns on a printed circuit board.
Such a BGA type semiconductor device has advantages in providing a large number of conductive terminals and in reducing size over the other CSP type semiconductor devices such as an SOP (Small Outline Package) and a QFP (Quad Flat Package), which have lead pins protruding from their sides.
FIGS. 8 and 9 are cross-sectional views showing a structure and a manufacturing method of a BGA type semiconductor device, showing the periphery of a pad electrode in particular. A pad electrode 52 is formed on the front surface of a semiconductor substrate 50 with a first insulation film 51 interposed therebetween, and a first protection film 53 having an opening on this pad electrode 52 and covering the first insulation film 51 and the end portion of the pad electrode 52 is formed as shown in FIG. 8. The pad electrode 52 is connected to an electronic circuit (not shown) formed on the semiconductor substrate 50, and signals are sent between the electronic circuit and an external circuit through this pad electrode 52.
After the electronic circuit is formed on the semiconductor substrate 50 through a wafer process of a semiconductor, a test is executed to check whether or not the electronic circuit operates normally. At this time, a measuring needle 54 is brought into contact with the front surface of the pad electrode 52 through the opening provided to the first protection film 53. Although only one pad electrode 52 is shown in FIG. 8, a plurality of pad electrodes 52 is actually formed on the semiconductor substrate 50 in the same manner. The measuring needle 54 is connected to an LSI tester 100. A test signal is then sent from the LSI tester 100 to the electronic circuit through the measuring needle 54 and the pad electrode 52, and the LSI tester 100 receives a response signal from the electronic circuit in the reverse course, thereby completing the test measurement of the electronic circuit.
The semiconductor substrate 50 completing the above test measurement is sent to the subsequent process, and then a via hole, a wiring, a ball-shaped conductive terminal and so on are formed thereon. In detail, a glass substrate 56 for supporting the semiconductor substrate 50 is attached on the front surface of the semiconductor substrate 50 with a resin film for attachment 55 interposed therebetween as shown in FIG. 9. Then, a via hole 57 penetrating the semiconductor substrate 50 is formed, a second insulation film 58 covering the sidewall of the via hole 57 and the back surface of the semiconductor substrate 50 is formed, and a wiring layer 59 connected to the back surface of the pad electrode 52 through the via hole 57 and extending onto the back surface of the semiconductor substrate 50 is formed. Then, a second protection film 60 covering the back surface of the semiconductor substrate 50 and having an opening on the wiring layer 59 is formed, and a ball-shaped conductive terminal 61 is formed therein, being connected to the wiring layer 59 through this opening. The relevant technology is disclosed in Japanese Patent Application Publication No. 2003-309221.
In the described BGA type semiconductor device, however, the pad electrode 52 is damaged since an end portion of the measuring needle 54 is in contact with the pad electrode 52 by pressure in the test of the electronic circuit, and this damage easily causes moisture infiltration and corrosion of the pad electrode 52.
Furthermore, since an opening K of the first protection film 53 is provided on the pad electrode 52, fixing of the pad electrode 52 is unstable in a vertical direction after the via hole 57 is formed, and the pad electrode 52 warps at its center portion or cracks in the worse case by a heat treatment after the via hole 57 is formed. To raise a concrete example of the influence of the heat treatment, when the second insulation film 58 is made of an organic film such as a photoresist, a baking treatment is performed for setting the organic film. The second insulation film 58 shrinks in this treatment, and downward tensile stress occurs to the pad electrode 52. This tensile stress causes the pad electrode 52 warping at its center.